Design and Manufacturing IP for USB-C/PD IC/ASICs


IQonIC Works offers a range of options for developing and integrating USB-C/PD functions on your next IC/ASIC product.


  • Soft IP of Digital blocks
  • Analog IP schematics
  • Firmware
  • Hard Macros
  • GDS of pre-integrated IC solutions for your manufacture as standalone devices or multi-die packaged solutions (SIP)
  • Finished IC. Unbranded, packaged and tested ICs to OEM.


  • Source-only port
  • Sink-only port
  • Full DRP port
  • Accessory support
  • Debug support
  • VCONN powered accessory or VCONN powered device
  • Combination of any or all of the above

Flexible Licensing Options

  • Project based, Term, or Perpetual Licenses
  • Single Project or Multi-Project
  • Single Technology or Multi-Project/Multi-Technology
  • Manufacturing License options (GDS IP)

IP Platform

IQonIC Works offers a library of modular IP building blocks supporting a wide range of application specific solutions, including pre-integrated IQonIC Works configurations and customer own integrations.


USB-PD functions and protocol layer implementations are available both in HW and in FW, offering a wide range of application specific integration options, including:

  • HW only. All Type-C/PD and application functions in hardware.


  • Embedded CPU dedicated to the USB-C/PD functions. PD stack upper layers implemented in firmware, All lower level PD and Type-C functions in hardware.


  • Sharing an applications CPU for the USB-C/PD firmware and a USB-C/PD hardware block as a peripheral to the shared CPU.


Deliverables and Supporting Services

IQonIC Works provides the following deliverables in support of customer USB-C/PD needs, and can also supply a range of additional supporting IP blocks:

Deliverables Related IP:
  • Detailed data sheet and integration guide
  • Synthesizable Verilog RTL source code
  • FW source code
  • ASIC synthesis constraints
  • FPGA development board with analog mezzanine card
  • Complete USB-PD analog IP in GDSII, including analog PHY
  • UVM based verification environment and test cases
  • Design guide, programming user manual, and verification guide
  • Communications IP
    • SPI master and SPI slave controllers
    • I2C master and I2C & I3C  slave controllers
    • UART controller
    • General purpose I/O (GPIO) controller
  • Watchdog and sleep timers
  • ADC
  • Regulators and Bandgaps
    • RISC-V CPU processor cores
    • RISC-V core platform and IP, timer and platform-level interrupt controller, and other IP
  • 8051 MCU
    • 8051 CPU core
    • 8051 core platform and IP, optional timer and port peripherals, APB or AHB bridge for memory-mapped I/O, debug controller accessed via a JTAG TAP for in-system debug, and optional DSP co-processor for signal processing applications
  • ARM Cortex-Mx class CPU cores, core platforms and related IP.
Add-on IP:
  • ARM CryptoCell-312 IP to support Authentication
  • Application specific AFE and control, e.g. BC1.2/QC, custom AFE for moisture detection and killer protection
  • DMAC if required by firmware
  • NVM (eFlash) or ROM for firmware
  • Application specific digital I/O